8086: Microprocessor.
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Multiple Choice Questions and Answers:-
           
1. A microprocessor is a _______ chip integrating all the functions of a CPU of a computer.

A. multiple
B. single
C. double
D. triple

Answer: B

2. Microprocessor is a/an _______ circuit that functions as the CPU of the compute

A. electronic
B. mechanic
C. integrating
D. processing

Answer: A

3. Microprocessor is the ______ of the computer and it perform all the computational tasks

A. main
B. heart
C. important
D. simple

Answer: B

4. The purpose of the microprocessor is to control ______

A. memory
B. switches
C. processing
D. tasks

Answer: A

5. The first digital electronic computer was built in the year________

A. 1950
B. 1960
C. 1940
D. 1930

Answer: C

6. In 1960's texas institute invented ______

A. integrated circuits
B. microprocessor
C. vacuum tubes
D. transistors

Answer: A

7. The intel 8086 microprocessor is a _______ processor

A. 8 bit
B. 16 bit
C. 32 bit
D. 4 bit

Answer: B

8. The microprocessor can read/write 16 bit data from or to ________

A. memory
B. I /O device
C. processor
D. register

Answer: A

9. In 8086 microprocessor , the address bus is ________ bit wide

A.1
2 bit
B. 10 bit
C. 16 bit
D. 20 bit

Answer: D

10. The work of EU is ________

A. encoding
B. decoding
C. processing
D. calculations

Answer: B

11. The 16 bit flag of 8086 microprocessor is responsible to indicate ___________

A. the condition of result of ALU operation
B. the condition of memory
C. the result of addition
D. the result of subtraction

Answer: A

12. The CF is known as ________

A. carry flag
B. condition flag
C. common flag
D. single flag

Answer: A

13. The SF is called as ________

A. service flag
B. sign flag
C. single flag
D. condition flag

Answer: B

14. The OF is called as _______

A. overflow flag
B. overdue flag
C. one flag
D. over flag

Answer: A

15. The IF is called as _________

A. initial flag
B. indicate flag
C. interrupt flag
D. inter flag

Answer: C

16. The register AX is formed by grouping ________

A. AH & AL
B. BH & BL
C. CH & CL
D. DH & DL

Answer: A

17. The SP is indicated by ________

A. single pointer
B. stack pointer
C. source pointer
D. destination pointer

Answer: B

18. The BP is indicated by _______

A. base pointer
B. binary pointer
C. bit pointer
D. digital pointer

Answer: A

19. The SS is called as ________

A. single stack
B. stack segment
C. sequence stack
D. random stack

Answer: B

20. The index register are used to hold _______

A. memory register
B. offset address
C. segment memory
D. offset memory

Answer: A

21. The BIU contains FIFO register of size __________ bytes

A. 8
B. 6
C. 4
D. 12

Answer: B

22. The BIU prefetches the instruction from memory and store them in ________

A. queue
B. register
C. memory
D. stack

Answer: A

23. The 1 MB byte of memory can be divided into ______ segment

A. 1 Kbyte
B. 64 Kbyte
C. 33 Kbyte
D. 34 Kbyte

Answer: B

24. The DS is called as _______

A. data segment
B. digital segment
C. divide segment
D. decode segment

Answer: A

25. The CS register stores instruction _____________ in code segment

A. stream
B. path
C. codes
D. stream line

Answer: C

26. The IP is ________ bits in length

A. 8 bits
B. 4 bits
C. 16 bits
D. 32 bits

Answer: C

27. The push source copies a word from source to ______

A. stack
B. memory
C. register
D. destination

Answer: A

28. LDs copies to consecutive words from memory to register and ___________

A. ES
B. DS
C. SS
D. CS

Answer: B

29. INC destination increments the content of destination by _______

A. 1
B. 2
C. 30
D. 41

Answer: A

30. IMUL source is a signed _________

A. multiplication
B. addition
C. subtraction
D. division

Answer: A

31. _________destination inverts each bit of destination

A. NOT
B. NOR
C. AND
D. OR

Answer: A

32. The JS is called as ______

A. jump the signed bit
B. jump single bit
C. jump simple bit
D. jump signal it

Answer: A

33. Instruction providing both segment base and offset address are called _____

A. below type .
B. far type
C. low type
D. high type

Answer: B

34. The conditional branch instruction specify ___________ for branching

A. conditions
B. instruction
C. address
D. memory

Answer: A

35. The microprocessor determines whether the specified condition exists or not by testing the
______

A. carry flag
B. conditional flag
C. common flag
D. sign flag

Answer: B

36. The LES copies to words from memory to register and __________

A. DS
B. CS
C. ES
D. DS

Answer: C

37. The _________ translates a byte from one code to another code

A. XLAT
B. XCHNG
C. POP
D. PUSH

Answer: A

38. The _______ contains an offset instead of actual address

A. SP
B. IP
C. ES
D. SS

Answer: B

39. The 8086 fetches instruction one after another from __________ of memory

A. code segment
B. IP
C. ES
D. SS

Answer: A

40. The BIU contains FIFO register of size 6 bytes called _____.

A. queue
B. stack
C. segment
D. register

Answer: A

41. The ___________ is required to synchronize the internal operands in the processor CLK
Signal

A. UR Signal
B. Vcc
C. AIE
D. Ground

Answer: A

42. The pin of minimum mode AD0-AD15 has ____________ address

A. 16 bit
B. 20 bit
C. 32 bit
D. 4 bit

Answer: B

43. The pin of minimum mode AD0- AD15 has _________ data bus

A. 4 bit
B. 20 bit
C. 16 bit
D. 32 bit

Answer: C

44. The address bits are sent out on lines through __________

A. A16-19
B. A0-17
C. D0-D17
D. C0-C17

Answer: A

45. ________ is used to write into memory

A. RD
B. WR
C. RD / WR
D. CLK

Answer: B

46. The functions of Pins from 24 to 31 depend on the mode in which _______ is operating

A. 8085
B. 8086
C. 80835
D. 80845

Answer: B

47. The RD, WR, M/IO is the heart of control for a __________ mode

A. minimum
B. maximum
C. compatibility mode
D. control mode

Answer: A

48. In a minimum mode there is a ___________ on the system bus

A. single
B. double
C. multiple
D. triple

Answer: A

49. If MN/MX is low the 8086 operates in __________ mode

A. Minimum
B. Maximum
C. both (A) and (B)
D. medium

Answer: B

50. In max mode, control bus signal So,S1 and S2 are sent out in ____________ form

A. decoded
B. encoded
C. shared
D. unshared

Answer: B

51. The ___ bus controller device decodes the signals to produce the control bus signal

A. internal
B. data
C. external
D. address

Answer: C

52. A _____ Instruction at the end of interrupt service program takes the execution back to the
interrupted program

A. forward
B. return
C. data
D. line

Answer: B

53. The main concerns of the ___________ are to define a flexible set of commands

A. memory interface
B. peripheral interface
C. both (A) and (B)
D. control interface

Answer: A

54. Primary function of memory interfacing is that the _________ should be able to read from
and write into register

A. multiprocessor
B. microprocessor
C. dual Processor
D. coprocessor

Answer: B

55. To perform any operations, the Mp should identify the __________

A. register
B. memory
C. interface
D. system

Answer: A

56. The Microprocessor places __________ address on the address bus

A. 4 bit
B. 8 bit
C. 16 bit
D. 32 bit

Answer: C

57. The Microprocessor places 16 bit address on the add lines from that address by _____
register should be selected

A. address
B. one
C. two
D. three

Answer: B

58. The ________of the memory chip will identify and select the register for the EPROM

A. internal decoder
B. external decoder
C. address decoder
D. data decoder

Answer: A

59. Microprocessor provides signal like ____ to indicate the read operatio

A. LOW
B. MCMW
C. MCMR
D. MCMWR

Answer: C

60. To interface memory with the microprocessor, connect register the lines of the address bus
must be added to address lines of the _______ chip.

A. single
B. memory
C. multiple
D. triple

Answer: B

61. The remaining address line of ______ bus is decoded to generate chip select signal

A. data
B. address
C. control bus
D. both (a) and (b)
Answer: B

62. _______ signal is generated by combining RD and WR signals with IO/M

A. control
B. memory
C. register
D. system

Answer: A

63. Memory is an integral part of a _______ system

A. supercomputer
B. microcomputer
C. mini computer
D. mainframe computer

Answer: B

64. _____ has certain signal requirements write into and read from its registers

A. memory
B. register
C. both (a) and (b)
D. control

Answer: A

65. An _________ is used to fetch one address

A. internal decoder
B. external decoder
C. encoder
D. register

Answer: A

66. The primary function of the _____________ is to accept data from I/P devices

A. multiprocessor
B. microprocessor
C. peripherals
D. interfaces

Answer: B

67. ___________ signal prevent the microprocessor from reading the same data more than one

A. pipelining
B. handshaking
C. controlling
D. signaling

Answer: B

68. Bits in IRR interrupt are ______

A. reset
B. set
C. stop
D. start

Answer: B

69. __________ generate interrupt signal to microprocessor and receive acknowledge

A. priority resolver
B. control logic
C. interrupt request register
D. interrupt register

Answer: B

70. The _______ pin is used to select direct command word

A. A0
B. D7-D6
C. A12
D. AD7-AD6

Answer: A

71. The _______ is used to connect more microprocessor

A. peripheral device
B. cascade
C. I/O devices
D. control unit

Answer: B

72. CS connect the output of ______

A. encoder
B. decoder
C. slave program
D. buffer

Answer: B

73. In which year, 8086 was introduced?

A. 1978
B. 1979
C. 1977
D. 1981

Answer: A

74. Expansion for HMOS technology_______

A. high level mode oxygen semiconductor
B. high level metal oxygen semiconductor
C. high performance medium oxide semiconductor
D. high performance metal oxide semiconductor

Answer: D

75. 8086 and 8088 contains _______ transistors

A. 29000
B. 24000
C. 34000
D. 54000

Answer: A

76. ALE stands for ___________

A. address latch enable
B. address level enable
C. address leak enable
D. address leak extension

Answer: A

77. What is DEN?

A. direct enable
B. data entered
C. data enable
D. data encoding

Answer: C

78. In 8086, Example for Non maskable interrupts are ________.

A. TRAP
B. RST6.5
C. INTR
D. RST6.6

Answer: A

79. In 8086 the overflow flag is set when _____________.

A. the sum is more than 16 bits.
B. signed numbers go out of their range after an arithmetic operation.
C. carry and sign flags are set.
D. subtraction

Answer: B

80. In 8086 microprocessor the following has the highest priority among all type interrupts?

A. NMI
B. DIV 0
C. TYPE 255
D. OVER FLOW

Answer: A

81. In 8086 microprocessor one of the following statements is not true?

A. coprocessor is interfaced in max mode.
B. coprocessor is interfaced in min mode.
C. I /O can be interfaced in max / min mode.
D. supports pipelining

Answer: B

82. Address line for TRAP is?

A. 0023H
B. 0024H
C. 0033H
D. 0099H

Answer: B

83. Access time is faster for _________.

A. ROM
B. SRAM
C. DRAM
D. ERAM

Answer: B

84. The First Microprocessor was__________.

A. Intel 4004
B. 8080
C. 8085
D. 4008

Answer: A

85. Status register is also called as ___________.

A. accumulator
B. stack
C. counter
D. flags

Answer: D

86.Which of the following is not a basic element within the microprocessor?

A.Microcontroller
B. Arithmetic logic unit (ALU)
C. Register array
D. Control unit

Answer: A

87.Which method bypasses the CPU for certain types of data transfer?

A.Software interrupts
B. Interrupt-driven I/O
C. Polled I/O
D. Direct memory access (DMA)

Answer: D

88.Which bus is bidirectional?

A.
Address bus
B. Control bus
C. Data bus
D. None of the above

Answer: C

89.The first microprocessor had a(n)________.

A.1 – bit data bus
B. 2 – bit data bus
C. 4 – bit data bus
D. 8 – bit data bus

Answer: C

90.Which microprocessor has multiplexed data and address lines?

A.8086
B. 80286
C. 80386
D. Pentium

Answer: A

91.Which is not an operand?

A.Variable
B. Register
C. Memory location
D. Assembler

Answer: D

92.Which is not part of the execution unit (EU)?

A.Arithmetic logic unit (ALU)
B. Clock
C. General registers
D. Flags

Answer: B

93.A 20-bit address bus can locate ________.

A.1,048,576 locations
B. 2,097,152 locations
C. 4,194,304 locations
D. 8,388,608 locations

Answer: A

94.Which of the following is not an arithmetic instruction?

A. INC (increment)
B. CMP (compare)
C. DEC (decrement)
D. ROL (rotate left)

Answer: D

95.During a read operation the CPU fetches ________.

A.a program instruction
B. another address
C. data itself
D. all of the above

Answer: D

96.Which of the following is not an 8086/8088 general-purpose register?

A.Code segment (CS)
B. Data segment (DS)
C. Stack segment (SS)
D. Address segment (AS)

Answer: D

97.A 20-bit address bus allows access to a memory of capacity

A.1 MB
B. 2 MB
C. 4 MB
D. 8 MB

Answer: A

98.Which microprocessor accepts the program written for 8086 without any changes?

A.8085
B. 8086
C. 8087
D. 8088

Answer: D

99.Which group of instructions do not affect the flags?

A.Arithmetic operations
B. Logic operations
C. Data transfer operations
D. Branch operations

Answer: C

100.The result of MOV AL, 65 is to store

A.store 0100 0010 in AL
B. store 42H in AL
C. store 40H in AL
D. store 0100 0001 in AL

Answer: D